Recently, CMOS imagers for a digital still camera, a camcorder, a security camera, and the like have been widely used and markets have also extended.
The CMOS imager converts light incident on each pixel into electrons by a photodiode, which is a photoelectric conversion element, accumulates the electrons for a fixed period of time, digitalizes a signal reflecting an accumulated electric charge amount thereof, and outputs the digitalized signal to the outside.
FIG. 1 is a diagram showing an example of a pixel circuit including four transistors in one unit pixel.
A pixel circuit PX1 of one unit has a photo diode 1, a transfer transistor 2, a reset transistor 3, an amplifier transistor 4, a row selection transistor 5, an accumulation node 6, and floating diffusion (FD, a floating diffusion layer) 7.
A gate electrode of the transfer transistor 2 is connected to a transfer line 8, and a gate electrode of the reset transistor 3 is connected to a reset line 9. A gate electrode of the amplifier transistor 4 is connected to the FD 7, and a gate electrode of the row selection transistor 5 is connected to a row selection line 10. A source of the row selection transistor 5 is connected to a vertical signal line 11.
A constant current circuit 12 and a sensing circuit 13 are connected to the vertical signal line 11.
In the pixel circuit PX1, light incident on a silicon substrate of a pixel generates pairs of electrons and holes, and the electrons thereof are focused and accumulated in the node 6 by the photodiode 1. The electrons are ultimately read as a signal directed to the vertical signal line 11.
Hereinafter, specific operations of electric charge accumulation and read will be described with reference to FIG. 2.
FIGS. 2(A) to 2(D) are diagrams showing a timing chart of the pixel circuit of FIG. 1.
First, a pixel is reset ahead of electric charge accumulation. Thereby, the reset line 9 and the transfer line 8 are set to a high level, so that the reset transistor 3 and the transfer transistor 2 are in an ON state. For example, this is an operation of transferring a power supply voltage of 3 V to the accumulation node 6 of the photodiode.
Thereby, a potential of the accumulation node 6 rises and the electrons accumulated therein are extracted.
In a hole-accumulation diode (HAD) that has recently become mainstream, the accumulation node 6 is formed in an n-type buried diffusion layer interposed between p-type layers, and all electrons are discharged, so that it is in a full depletion state. An increase of the potential of the node 6 is also stopped at a point in time when all the electrons have been discharged, and its level becomes a predetermined level lower than the power supply voltage 3 V.
Thereafter, the transfer line 8 has a low level and the transfer transistor 2 is turned off, so that the accumulation node 6 is in the floating state and new electric charge accumulation is started. During the electric charge accumulation, the reset transistor 3 is normally turned off.
In general, the above-described pixel reset operation is used as an electronic shutter operation of a CMOS image sensor.
Next, an operation of reading the accumulated electric charge will be described.
First, the row selection line 10 has a high level and the row selection transistor 5 is turned on, so that the amplifier transistor 4 of the pixel is connected to the vertical signal line 11.
Here, the vertical signal line 11 connected to the amplifier transistor 4 and the constant current circuit 12 form a source follower circuit, and a potential Vf of the FD 7, which is its input, and a potential Vsl of the vertical signal line 11, which is its output, have a linear relationship close to a variation ratio of 1.
That is, if a current value of the constant current circuit 12 is i, the following expression is ideally established.i=(1/2)*β*(Vf−Vth−Vsl)2, where β is a constant.  [Expression 1]
Here, (Vf−Vth−Vsl) becomes constant, and a variation of Vf is linearly reflected in Vsl.
That is, the source follower circuit operates as an amplifier circuit in which a gain is about 1, and drives the vertical signal line 11 according to a signal amount of the FD 7, which is an input node.
Here, the power supply voltage 3V is transferred to the FD 7 by switching the reset line 9 to a high level and turning on the reset transistor 3.
Further, after the reset transistor 3 is turned off, first sensing of the potential Vsl of the vertical signal line 11 is performed by a sensing circuit 13 constituted by a comparator, an analog/digital converter (ADC), or the like. This is the read of a reset signal.
Next, electrons accumulated in the accumulation node 6 flows into the FD 7 by switching the transfer line 8 to the high level and turning on the transfer transistor 2.
In this case, if the potential of the FD 7 is sufficiently deep, that is, a high potential, all the electrons accumulated in the accumulation node 6 are discharged to the FD 7, and the accumulation node 6 is in the full depletion state.
Here, the transfer transistor 2 is turned off and second sensing of the potential of the vertical signal line 11 is performed. This is the read of an accumulated signal.
A difference between the first sensing and the second sensing of the above-described Vsl accurately reflects an electric charge amount accumulated in the accumulation node 6 by exposure of the photodiode 1.
The CMOS imager digitalizes the difference and outputs the digitalized result to the outside as a pixel signal value. An electron accumulation time of each pixel is a period of time between the reset operation and the read operation described above, and accurately, is a period T1 until the transfer transistor 2 is turned off in the read after the transfer transistor 2 is reset and then turned off.
In general, in a CMOS type imager, accumulated electrons generated by the photoelectric conversion element are converted into an analog signal of the vertical signal line 11 via the amplifier circuit for each pixel, and the analog signal is transferred to the sensing circuit 13.
Further, the analog signal is converted into a digital signal by the ADC, and the digital signal is output outside a chip.
This is significantly different from a CCD type imager in which accumulated electrons themselves are vertically/horizontally transferred by a CCD transfer immediately before a chip output amplifier circuit.